TSMC Unveils A14, A13, and N2U at 2026 Technology Symposium — A16 Slips to 2027

TSMC used its 2026 North America Technology Symposium in San Jose, California on April 22 to publicly extend its process roadmap through the end of the decade, introducing three new nodes: A14, A13, and N2U. According to coverage from Tom's Hardware and Semiconductor Engineering, A14 will use TSMC's NanoFlex Pro standard-cell architecture and is targeted for high-volume manufacturing in 2028. A13, a 1.3-nm-class node, lands one year later in 2029 and provides roughly 6% area savings over A14 with design rules fully backward compatible to enable fast IP migration.

N2U is the most immediate near-term update for customers already designing on N2. TSMC's data shows N2U delivering a 3–4% speed improvement at iso-power, 8–10% power reduction at iso-frequency, and a 1.02–1.03X logic density gain over N2P, with production scheduled for 2028. Counter to those launches, A16 — TSMC's first node with backside power delivery — saw its high-volume manufacturing start pushed from 2026 into 2027, a slip TrendForce attributed to backside-power yield ramps and EUV tool readiness. TSMC notably continues to plan A12 and A13 without High-NA EUV, instead relying on multi-patterning and additional Low-NA EUV layers.

The symposium also delivered a major U.S. capacity update. TSMC's board approved the purchase of 900 acres in Phoenix, Arizona on January 7, 2026, and the company has now applied for permits to begin construction. CFO Wendell Huang told the Symposium audience that TSMC plans to add CoWoS and 3D-IC advanced-packaging capacity at the Arizona site before 2029 — a structural change to TSMC's footprint, since to date virtually all CoWoS volume has been built in Taiwan. Combined with NVIDIA's reservation of advanced-packaging capacity through 2027 and the recently floated TSMC–Intel Foundry joint-venture talks, the roadmap update positions TSMC for what management again described as a multi-year AI-driven super-cycle.