TSMC Accelerates 2nm With Five-Fab Ramp Targeting 60K Wafers Per Month in 2026

Taiwan Semiconductor Manufacturing Company is putting five 2nm fabs into volume ramp during 2026 — what management has called the most aggressive node expansion in the company's history. The build-out spans the Nanzih Science Park in Kaohsiung, additional shells in Hsinchu, and the second and third Arizona modules, and is designed to lift combined N2 output by up to 45% above peak 3nm capacity, according to supply-chain models published by SemiWiki and DigiTimes.

Supply-side trackers now estimate monthly N2 wafer output will pass 60,000 wafers per month this year, with year-end 2026 targets in the 120,000–140,000 wafer-per-month range as additional shells complete tool-in. The first fab in Kaohsiung's P1 module was quietly placed into volume production in Q4 2025, and Tom's Hardware reports that the N2 yield-learning curve is outperforming the equivalent N3 ramp at the same maturity point — TSMC has publicly claimed up to a 15% performance gain at iso-power for the first nanosheet (gate-all-around) generation.

Demand allocation is already locked. Apple, NVIDIA and AMD have pre-booked the bulk of 2026 N2 wafer slots for the iPhone A20 generation, Vera Rubin AI accelerators, and the next-generation EPYC and Instinct MI400 lines, leaving Broadcom and the merchant ASIC base competing for the remainder. TSMC has raised its 2026 capex guidance to the high end of its $52 billion–$56 billion range to fund the expansion, and CFO Wendell Huang has flagged that leading-edge supply will remain constrained through 2027 — a backdrop that keeps Apple talking with Intel Foundry and pushes more downstream customers toward Samsung Texas as a second source.