ASML Says First High-NA EUV Chips Arrive in Months as Intel and SK Hynix Lead Adoption

ASML chief executive Christophe Fouquet told the imec Future Summit in Antwerp on May 19, 2026 that the first commercial chips produced on the company's next-generation High-NA EUV lithography platform will surface 'in the next few months,' across both memory and logic. The statement marks the moment the world's most expensive chip-making tool — at up to $400 million per system — moves out of pilot lines and into revenue-generating production for the customers that have already installed it.

Adoption is uneven. Intel says its first two High-NA machines are now in production and have already exposed roughly 300,000 wafers as it preps the 14A node, and SK Hynix became the world's first chipmaker to assemble a commercial High-NA system in a production environment under a separate $8 billion tools agreement targeting future DRAM and HBM4E generations. High-NA uses a 0.55 numerical aperture column with the same 13.5 nm EUV source as Low-NA but improves single-exposure resolution to roughly 8 nm, eliminating the multi-patterning steps that have weighed on cycle time at the 2nm node.

The split with TSMC, ASML's biggest customer, is the other half of the story. Taiwan's foundry has publicly deferred High-NA for its A14 and A13 nodes, telling investors the tool is 'too expensive for now' and that it will instead extend Low-NA with multi-patterning to compete on per-wafer economics. TrendForce reports ASML has quietly pivoted its near-term roadmap to make the case for Low-NA ROI while keeping High-NA volume scaled to Intel and the Korean memory makers. With Samsung also weighing High-NA insertion for its 1.4nm program, the industry is now openly divided over how to push patterning beyond 2nm — and ASML's order book over the next 18 months will indicate which bet wins.